/* A PIC16F62XA portjainak és bitjeinek
   saját definiciója, mert zavarnak a CCS sajátos fv-ei */

#ifndef	__PIC16F62XA_H
#define	__PIC16F62XA_H

#TYPE   SHORT=8, INT=16, LONG=32

#byte 	INDF	= 0x00 
#byte 	TMR0	= 0x01 
#byte 	PCL		= 0x02 
#byte 	STATUS	= 0x03 
#byte 	FSR		= 0x04 
#byte 	PORTA	= 0x05 
#byte 	PORTB	= 0x06 
#byte 	PCLATH	= 0x0A 
#byte 	INTCON	= 0x0B 
#byte 	PIR1	= 0x0C 
#byte 	TMR1L	= 0x0E 
#byte 	TMR1H	= 0x0F 
#byte 	T1CON	= 0x10 
#byte 	TMR2	= 0x11 
#byte 	T2CON	= 0x12 
#byte 	CCPR1L	= 0x15 
#byte 	CCPR1H	= 0x16 
#byte 	CCP1CON	= 0x17 
#byte 	RCSTA	= 0x18 
#byte 	TXREG	= 0x19 
#byte 	RCREG	= 0x1A 
#byte 	CMCON	= 0x1F 
#byte 	OPTION	= 0x81 
#byte 	TRISA	= 0x85 
#byte 	TRISB	= 0x86 
#byte 	PIE1	= 0x8C 
#byte 	PCON	= 0x8E 
#byte 	PR2		= 0x92 
#byte 	TXSTA	= 0x98 
#byte 	SPBRG	= 0x99 
#byte 	EEDATA	= 0x9A 
#byte 	EEADR	= 0x9B 
#byte 	EECON1	= 0x9C 
#byte 	EECON2	= 0x9D 
#byte 	VRCON	= 0x9F 


/* Definitions for STATUS register */
#bit	CARRY	= STATUS.0
#bit	DC		= STATUS.1
#bit	ZERO	= STATUS.2
#bit	PD		= STATUS.3
#bit	TO		= STATUS.4
#bit	RP0		= STATUS.5
#bit	RP1		= STATUS.6
#bit	IRP		= STATUS.7

/* Definitions for PORTA register */
#bit	RA0		= PORTA.0
#bit	RA1		= PORTA.1
#bit	RA2		= PORTA.2
#bit	RA3		= PORTA.3
#bit	RA4		= PORTA.4
#bit	RA5		= PORTA.5
#bit	RA6		= PORTA.6
#bit	RA7		= PORTA.7

/* Definitions for PORTB register */
#bit	RB0		= PORTB.0
#bit	RB1		= PORTB.1
#bit	RB2		= PORTB.2
#bit	RB3		= PORTB.3
#bit	RB4		= PORTB.4
#bit	RB5		= PORTB.5
#bit	RB6		= PORTB.6
#bit	RB7		= PORTB.7

/* Definitions for INTCON register */
#bit	RBIF	= INTCON.0
#bit	INTF	= INTCON.1
#bit	T0IF	= INTCON.2
#bit	RBIE	= INTCON.3
#bit	INTE	= INTCON.4
#bit	T0IE	= INTCON.5
#bit	PEIE	= INTCON.6
#bit	GIE		= INTCON.7

/* Definitions for PIR1 register */
#bit	TMR1IF	= PIR1.0
#bit	TMR2IF	= PIR1.1
#bit	CCP1IF	= PIR1.2
#bit	TXIF	= PIR1.4
#bit	RCIF	= PIR1.5
#bit	CMIF	= PIR1.6
#bit	EEIF	= PIR1.7

/* Definitions for T1CON register */
#bit	TMR1ON	= T1CON.0
#bit	TMR1CS	= T1CON.1
#bit	T1SYNC	= T1CON.2
#bit	T1OSCEN	= T1CON.3
#bit	T1CKPS0	= T1CON.4
#bit	T1CKPS1	= T1CON.5

/* Definitions for T2CON register */
#bit	T2CKPS0	= T2CON.0
#bit	T2CKPS1	= T2CON.1
#bit	TMR2ON	= T2CON.2
#bit	TOUTPS0	= T2CON.3
#bit	TOUTPS1	= T2CON.4
#bit	TOUTPS2	= T2CON.5
#bit	TOUTPS3	= T2CON.6

/* Definitions for CCP1CON register */
#bit	CCP1M0	= CCP1CON.0
#bit	CCP1M1	= CCP1CON.1
#bit	CCP1M2	= CCP1CON.2
#bit	CCP1M3	= CCP1CON.3
#bit	CCP1Y	= CCP1CON.4
#bit	CCP1X	= CCP1CON.5

/* Definitions for RCSTA register */
#bit	RX9D	= RCSTA.0
#bit	OERR	= RCSTA.1
#bit	FERR	= RCSTA.2
#bit	ADEN	= RCSTA.3
#bit	CREN	= RCSTA.4
#bit	SREN	= RCSTA.5
#bit	RX9		= RCSTA.6
#bit	SPEN	= RCSTA.7

/* Definitions for CMCON register */
#bit	CM0		= CMCON.0
#bit	CM1		= CMCON.1
#bit	CM2		= CMCON.2
#bit	CIS		= CMCON.3
#bit	C1INV	= CMCON.4
#bit	C2INV	= CMCON.5
//#bit	C1OUT	= CMCON.6
//#bit	C2OUT	= CMCON.7

/* Definitions for OPTION register */
#bit	PS0		= OPTION.0
#bit	PS1		= OPTION.1
#bit	PS2		= OPTION.2
#bit	PSA		= OPTION.3
#bit	T0SE	= OPTION.4
#bit	T0CS	= OPTION.5
#bit	INTEDG	= OPTION.6
#bit	RBPU	= OPTION.7

/* Definitions for TRISA register */
#bit	TRISA0	= TRISA.0
#bit	TRISA1	= TRISA.1
#bit	TRISA2	= TRISA.2
#bit	TRISA3	= TRISA.3
#bit	TRISA4	= TRISA.4
#bit	TRISA5	= TRISA.5
#bit	TRISA6	= TRISA.6
#bit	TRISA7	= TRISA.7

/* Definitions for TRISB register */
#bit	TRISB0	= TRISB.0
#bit	TRISB1	= TRISB.1
#bit	TRISB2	= TRISB.2
#bit	TRISB3	= TRISB.3
#bit	TRISB4	= TRISB.4
#bit	TRISB5	= TRISB.5
#bit	TRISB6	= TRISB.6
#bit	TRISB7	= TRISB.7

/* Definitions for PIE1 register */
#bit	TMR1IE	= PIE1.0
#bit	TMR2IE	= PIE1.1
#bit	CCP1IE	= PIE1.2
#bit	TXIE	= PIE1.4
#bit	RCIE	= PIE1.5
#bit	CMIE	= PIE1.6
#bit	EEIE	= PIE1.7

/* Definitions for PCON register */
#bit	BOR		= PCON.0
#bit	POR		= PCON.1
#bit	OSCF	= PCON.3

/* Definitions for TXSTA register */
#bit	TX9D	= TXSTA.0
#bit	TRMT	= TXSTA.1
#bit	BRGH	= TXSTA.2
#bit	SYNC	= TXSTA.4
#bit	TXEN	= TXSTA.5
#bit	TX9		= TXSTA.6
#bit	CSRC	= TXSTA.7

/* Definitions for EECON1 register */
#bit	RD		= EECON1.0
#bit	WR		= EECON1.1
#bit	WREN	= EECON1.2
#bit	WRERR	= EECON1.3

/* Definitions for VRCON register */
#bit	VR0		= VRCON.0
#bit	VR1		= VRCON.1
#bit	VR2		= VRCON.2
#bit	VR3		= VRCON.3
#bit	VRR		= VRCON.5
#bit	VROE	= VRCON.6
#bit	VREN	= VRCON.7

#endif