74XX595 - 8 Bit shift register with 3 state OP register

            Ŀ
          Ĵ              Ŀ
      QB                    VCC
          Ĵ              
          Ĵ              Ŀ
      QC                    QA
          Ĵ              
          Ĵ              Ŀ
      QD                    SER
          Ĵ              
          Ĵ              Ŀ  _
      QE                    G 
          Ĵ              
          Ĵ              Ŀ
      QF                    RCK
          Ĵ              
          Ĵ              Ŀ
      QG                    SRCK
          Ĵ              
          Ĵ              Ŀ  _____
      QH                    SRCLR
          Ĵ              
          Ĵ              Ŀ
      GND                   QH'
          Ĵ              
            

SER   - Seriel Data In
G     - Enable OP active low
RCK   - Register Clock
SR    - Seriel Clock
SRCLR - Seriel Clear

400nS Maximum clock rise and fall times
(Note Internal race problems will affect
IC if clock to slow)
