; ; *************************************************** ; * Railway gate with an ATtiny24 and a servo motor * ; * V1, 19.07.2014, translated 17.03.2018 * ; * (C)2014-2018 by http://www.avr-asm-tutorial.net * ; *************************************************** ; ; Include file for the AVR type .NOLIST .INCLUDE "tn24def.inc" ; Header file for ATtiny24 .LIST ; ; Debug switches (final: all zero) .equ debugparam=0 ; ; ============================================ ; H A R D W A R E I N F O R M A T I O N ; ============================================ ; ; ______________ ; / ATtiny24 | ; +U o--|VCC GND|--o -U ; Duo LED | | ; Red o--|PB0 ADC0|--o Lower trim ; Anode | | ; Red o--|PB1 ADC1|--o Upper trim ; Cat | | ; RESET o--|RESET ADC3|--o Speed trim ; | | ; DWN o--|INT0 PA4|--o NC ; | | ; UP o--|PCINT7 USC0|--o SCK ; | | ; PWM-SIG o--|OC1A/MOSI MISO|--o MISO ; & MOSI |______________| ; ; ; ============================================ ; P O R T S A N D P I N S ; ============================================ ; ; Ports for LED control .EQU pLedO = PORTB .EQU pLedI = PINB .EQU pLedD = DDRB .EQU bLedPlO = PORTB0 .EQU bLedPlD = DDB0 .EQU bLedPlI = PINB0 .EQU bLedMiO = PORTB1 .EQU bLedMiD = DDB1 .EQU bLedMiI = PINB1 ; Ports fuer Tastensteuerung .EQU pDwnO = PORTB .EQU pDwnD = DDRB .EQU bDwn = PORTB2 .EQU pUpO = PORTA .EQU pUpD = DDRA .EQU pUpI = PINA .EQU bUpO = PORTA7 .EQU bUpD = DDA7 .EQU bUpI = PINA7 ; Ports fuer PWM-Signal .EQU pPwmO = PORTA .EQU pPwmI = PINA .EQU pPwmD = DDRA .EQU bPwmO = PORTA6 .EQU bPwmD = DDA6 .EQU bPwmI = PINA6 ; ; ============================================= ; C O N S T A N T S T O A D J U S T ; ============================================= ; .EQU cMinMin = 900 ; us shortest PWM signal duration .EQU cMaxMax = 2100 ; us longest PWM signal duration .EQU cMinMed = 1000 ; us lower regulation limit .EQU cMaxMed = 2000 ; us upper regulation limit .EQU cMid = (cMaxMax+cMinMin) / 2 ; Middle position .EQU cPwm = 20000 ; us total PWM duration .EQU cSpeedHigh = 1000000 ; us duration fastest closing .EQU cSpeedLow = 7000000 ; us duration slowest closing ; ; =============================================== ; F I X E D + D E R I V E D C O N S T A N T S ; =============================================== ; .EQU cMaxMin = cMaxMax - 511 ; Lower limit closing .EQU cRoundsFast = cSpeedHigh / cPwm .EQU cRoundsSlow = cSpeedLow / cPwm .EQU cAdderFast = (cMaxMed - cMinMed) / cRoundsFast .EQU cAdderSlow = 1 ; Slow adder .EQU cSpeedMulti = cAdderFast - cAdderSlow ; ; =================================== ; P R O G R A M S T R U C T U R E ; =================================== ; ; All timing is based on a clock frequency of 1 MHz, ; which is the default clock frequency with CLKDIV8 ; set and the 8 MHz RC oscillator selected. ; ; ADC values ; Measuring the trim potentiometer settings runs with ; an ADC clock prescaler of 128. 64 measurements per ; channel are added up in the registers R0 to R5 and ; averaged. ; From this a measuring frequency of 1 Mhz / 128 / ; 13 clock cycles per conversion / 3 channels / 64 ; single measurements = approx. 3 Hz results. ; Calculation of those measurements goes as follows: ; Trim 1: Sum/128+cMinMin(900) ==> rClose (Minimum) ; Trim 2: cMaxMax(2100)-Sum/128 ==> rOpen (Maximum) ; Trim 3: (Sum/256*cSpeedMulti)/256+1 ==> rDelta ; (Speed), values vary between 1 and 23 ; (1 = 20 seconds closure time, 23 = one second ; closure time ; ; Timer1: Generation of the PWM signal ; TC1 is clocked by the clock signal and a prescaler ; of 1, one tick is therefore 1 us. ; TC1 runs as CTC and generates the PWM signal on the ; output pin OC1A on PA6. The output pin toggles on ; compare match A, TC1 restarts and triggers a ; compare match A intterupt. Depending from the state ; of the output pin either the duration in rCtcAct or ; in rCtcIna is written to the compare register A. The ; resulting looks as follows: ; ; _______ _______ ______ ; _____| |_________________| |_________________| ; rCtcAct rCtcIna rCtcAct rCtcIna ; |<======= 20.000 us =====>|<======= 20.000 us =====>| ; ; rCtcAct = 900 .. 2.100 us ; Lower limit adjustable with trim 1 between 900 and 1410 us ; Upper limit adjustable with trim 2 between 1590 and 2100 us ; rCtcIna = 20.000 - rCtcAct ; ; rCtcAct plus rCtcIna always yields 20.000 us, a 50 Hz signal. ; When the OC1A pin is set (after writing rCtcIna) the bPwm flag ; is set, which triggers execution of the routine PwmRdy. This ; determines if the gate is currently moving or not. ; If this is not the case, 25 following PWM signal bursts are ; sent with the current position (0.5 seconds). After that the ; PWM signal output is cleared (by clearing the output pin on ; compare match). ; If the gate is moving the duration of the PWM signal is increased ; by the content of rDelta, if the gate opens, or decreased if ; the gate closes. If, on opening, the upper limit in rOpen is ; exceeded the LED is switched to permanently green and the ; post-PWM period is initiated. ; If, on closing, the lower limit in rClose is reached the LED ; is switched to permanent red and the post-PWM period initiated. ; Bei aktiver Schranke wird die Dauer des PWM-Signals um den Betrag ; rDelta verlaengert (Schranke oeffnet sich) bzw. verkuerzt (Schranke ; schliesst sich). Ist beim Oeffnen die obere Grenze in rOben ueber- ; schritten wird die LED auf gruenes Dauerlicht geschaltet und der ; Nachlauf eingeleitet. Ist beim Schliessen die untere Grenze unter- ; schritten wird die LED auf rotes Dauerlicht geschaltet und der ; Nachlauf eingeleitet. ; If neither the upper nor the lower limit has been reached the ; LED blinks with 0.2 Hz. ; ; Triggering opening and closing of the gate ; If push button 1 is activated, an INT0 interrupt is triggered. ; This clears the upward flag. ; If push button 2 is activated, the PCINT0 interrupt is triggered. ; Following both interrupts and if the toggle bit of TC1 is not ; set, the rCtcIna value is written to the compare A port, the ; toggle mode in TC1 is set and the compare match A interrupt is ; enabled. Finally the "Gate active" flag is set. ; ; Adjusting ; If the value of the up- or down-trim-poentiometer is changed, ; the new value is immediately applied. If the gate is inactive ; (bActive flag cleared), the gate only moves if it is completely ; open (last movement upwards) or completely closed (last movement ; downwards). ; Changes of the speed trim potentiometer come only into effect ; if the gate moves. ; ; Start conditions ; On start up the gate is moved to to its middle position and then ; upwards to the upper limit. ; ; ============================================ ; R E G I S T E R D E F I N I T I O N S ; ============================================ ; ; R0 .. R5 : ADC sum values, three channels .DEF rCtcActL = R6 ; Active signal duration, us .DEF rCtcActH = R7 .DEF rCtcInaL = R8 ; Inactive signal duration, us .DEF rCtcInaH = R9 .DEF rCloseL = R10 ; Lower limit PWM signal .DEF rCloseH = R11 .DEF rOpenL = R12 ; Upper limit PWM signal .DEF rOpenH = R13 .DEF rDelta = R14 ; Step length for gate movement .DEF rSreg = R15 ; for SREG interim storage in ints .DEF rmp = R16 ; Multi purpose register .DEF rimp = R17 ; Multi purpose inside interrupts .DEF rimp2 = R18 ; 16 bit adder register in interrupts .DEF rAdcCnt = R19 ; Counter for ADC measurements .DEF rFlg = R20 ; Flag register .equ bActive = 0 ; Gate is moving .equ bHigh = 1 ; Gate is moving up .equ bAdc = 2 ; ADC sequence complete .equ bPwmIna = 3 ; Inactive PWM signal, handle flag .equ bOpen = 4 ; Gate is open .equ bClose = 5 ; Gate is closed .equ bToggle = 6 ; CTC toggle is active .DEF rPwmCtr = R21 ; Downcounter for post-PWM phase ; R22 .. R25 not used ; X = XH:XL Multiplication for speed adjustment ; Y = YH:YL ADC pointer to SRAM ; Z = ZH:ZL Multi purpose register pair outside interrupts ; ; ============================================ ; S R A M D E F I N I T I O N S ; ============================================ ; .DSEG .ORG 0X0060 sAdc: .Byte 6 ; ; ============================================== ; R E S E T A N D I N T V E C T O R E N ; ============================================== ; .CSEG .ORG $0000 rjmp Main ; Reset-Vector rjmp IntDwn ; Int Vector INT0 rjmp IntUp ; Int Vector PCINT0 reti ; Int Vector PCINT1 reti ; Int Vector WDT reti ; Int Vector TC1 Capture rjmp IntPwmA ; Int Vector TC1 Compare A reti ; Int Vector TC1 Compare B reti ; Int Vector TC1 OVF reti ; Int Vector TC0 Compare A reti ; Int Vector TC0 Compare B reti ; Int Vector TC0 OVF reti ; Int Vector Ana_Comp rjmp IntAdc ; Int Vector ADC reti ; Int Vector EEPROM Ready reti ; Int Vector USI START reti ; Int Vector USI Overflow ; ; ========================================== ; I N T E R R U P T S E R V I C E ; ========================================== ; ; Downwards push button IntDwn: in rSreg,SREG ; Save SREG cbr rFlg,1<