
    processor 10F202
    #include <P10F202.INC>
    __config _MCLRE_OFF & _CP_OFF & _WDT_OFF ; 0x0FEB

; RAM-Variable
LRAM_0x08 equ 0x08
LRAM_0x09 equ 0x09
LRAM_0x0A equ 0x0A

; Program

    Org 0x0000

;   Reset-Vector
	andlw	0xFE		 ; Since OSCAL.0 is the FOSC4 bit enablig oscillator output on GPIO.2
    MOVWF OSCCAL
    MOVLW 0x0E           ;   b'00001110'  d'014'
    TRIS GPIO
    MOVLW 0xF8           ;   b'11111000'  d'248'
    OPTION
    CLRF GPIO
    CLRF TMR0
LADR_0x0007
    MOVF TMR0,F
    BTFSS STATUS,Z
    GOTO LADR_0x000C
    BCF GPIO,GP0
    GOTO LADR_0x0007
LADR_0x000C
    DECF TMR0,F
    BSF GPIO,GP0
    CALL LADR_0x0010
    GOTO LADR_0x0007
LADR_0x0010
    MOVLW 0x07           ;   b'00000111'  d'007'
    MOVWF LRAM_0x08
    MOVLW 0x2F           ;   b'00101111'  d'047'  "/"
    MOVWF LRAM_0x09
    MOVLW 0x03           ;   b'00000011'  d'003'
    MOVWF LRAM_0x0A
LADR_0x0016
    DECFSZ LRAM_0x08,F
    GOTO LADR_0x0019
    DECFSZ LRAM_0x09,F
LADR_0x0019
    GOTO LADR_0x001B
    DECFSZ LRAM_0x0A,F
LADR_0x001B
    GOTO LADR_0x0016
    GOTO LADR_0x001D
LADR_0x001D
    GOTO LADR_0x001E
LADR_0x001E
    GOTO LADR_0x001F
LADR_0x001F
    RETLW 0x00           ;   b'00000000'  d'000'

    Org 0x01FF

    MOVLW 0x11           ;   b'00010000'  d'016'

    End
