Equations

********** Mapped Logic **********

FTCPE_counter10: FTCPE port map (counter1(0),'1',clk,'0','0');

FTCPE_counter11: FTCPE port map (counter1(1),counter1(0),clk,'0','0');

FTCPE_counter12: FTCPE port map (counter1(2),counter1_T(2),clk,'0','0');
counter1_T(2) <= (counter1(0) AND counter1(1));

FTCPE_counter13: FTCPE port map (counter1(3),counter1_T(3),clk,'0','0');
counter1_T(3) <= (counter1(0) AND counter1(1) AND counter1(2));

FTCPE_counter14: FTCPE port map (counter1(4),counter1_T(4),clk,'0','0');
counter1_T(4) <= (counter1(0) AND counter1(1) AND counter1(2) AND
counter1(3));

FTCPE_counter15: FTCPE port map (counter1(5),counter1_T(5),clk,'0','0');
counter1_T(5) <= (counter1(0) AND counter1(1) AND counter1(2) AND
counter1(3) AND counter1(4));

FTCPE_counter16: FTCPE port map (counter1(6),counter1_T(6),clk,'0','0');
     counter1_T(6) <= ((NOT counter1(0))
      OR (NOT counter1(1))
      OR (NOT counter1(2))
      OR (NOT counter1(3))
      OR (NOT counter1(5))
      OR (NOT counter1(10) AND counter1(11) AND NOT counter1(12) AND
      NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND NOT counter1(16) AND
      NOT counter1(17) AND counter1(18) AND counter1(19) AND NOT counter1(20) AND
      NOT counter1(21) AND NOT counter1(6) AND NOT counter1(7) AND counter1(8) AND
      counter1(9) AND counter1(22))
      OR (NOT counter1(4)));

FTCPE_counter17: FTCPE port map (counter1(7),counter1_T(7),clk,'0','0');
counter1_T(7) <= (counter1(0) AND counter1(1) AND counter1(2) AND
counter1(3) AND counter1(4) AND counter1(5) AND counter1(6));

FTCPE_counter18: FTCPE port map (counter1(8),counter1_T(8),clk,'0','0');
     counter1_T(8) <= ((counter1(0) AND counter1(1) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND counter1(6) AND
      counter1(7))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter19: FTCPE port map (counter1(9),counter1_T(9),clk,'0','0');
     counter1_T(9) <= ((counter1(0) AND counter1(1) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND counter1(6) AND
      counter1(7) AND counter1(8))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter110: FTCPE port map (counter1(10),counter1_T(10),clk,'0','0');
     counter1_T(10) <= (counter1(0) AND counter1(1) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND counter1(6) AND
      counter1(7) AND counter1(8) AND counter1(9));

FTCPE_counter111: FTCPE port map (counter1(11),counter1_T(11),clk,'0','0');
     counter1_T(11) <= ((counter1(0) AND counter1(10) AND counter1(1) AND
      counter1(2) AND counter1(3) AND counter1(4) AND counter1(5) AND
      counter1(6) AND counter1(7) AND counter1(8) AND counter1(9))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter112: FTCPE port map (counter1(12),counter1_T(12),clk,'0','0');
     counter1_T(12) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(1) AND counter1(2) AND counter1(3) AND counter1(4) AND
      counter1(5) AND counter1(6) AND counter1(7) AND counter1(8) AND
      counter1(9));

FTCPE_counter113: FTCPE port map (counter1(13),counter1_T(13),clk,'0','0');
     counter1_T(13) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(1) AND counter1(2) AND counter1(3) AND
      counter1(4) AND counter1(5) AND counter1(6) AND counter1(7) AND
      counter1(8) AND counter1(9));

FTCPE_counter114: FTCPE port map (counter1(14),counter1_T(14),clk,'0','0');
     counter1_T(14) <= ((counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(1) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND counter1(6) AND
      counter1(7) AND counter1(8) AND counter1(9))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter115: FTCPE port map (counter1(15),counter1_T(15),clk,'0','0');
     counter1_T(15) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(1) AND
      counter1(2) AND counter1(3) AND counter1(4) AND counter1(5) AND
      counter1(6) AND counter1(7) AND counter1(8) AND counter1(9));

FTCPE_counter116: FTCPE port map (counter1(16),counter1_T(16),clk,'0','0');
     counter1_T(16) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(1) AND counter1(2) AND counter1(3) AND counter1(4) AND
      counter1(5) AND counter1(6) AND counter1(7) AND counter1(8) AND
      counter1(9));

FTCPE_counter117: FTCPE port map (counter1(17),counter1_T(17),clk,'0','0');
     counter1_T(17) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(16) AND counter1(1) AND counter1(2) AND counter1(3) AND
      counter1(4) AND counter1(5) AND counter1(6) AND counter1(7) AND
      counter1(8) AND counter1(9));

FTCPE_counter118: FTCPE port map (counter1(18),counter1_T(18),clk,'0','0');
     counter1_T(18) <= ((counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(16) AND counter1(17) AND counter1(1) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND counter1(6) AND
      counter1(7) AND counter1(8) AND counter1(9))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter119: FTCPE port map (counter1(19),counter1_T(19),clk,'0','0');
     counter1_T(19) <= ((counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(16) AND counter1(17) AND counter1(18) AND counter1(1) AND
      counter1(2) AND counter1(3) AND counter1(4) AND counter1(5) AND
      counter1(6) AND counter1(7) AND counter1(8) AND counter1(9))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter120: FTCPE port map (counter1(20),counter1_T(20),clk,'0','0');
     counter1_T(20) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(16) AND counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND counter1(2) AND counter1(3) AND counter1(4) AND
      counter1(5) AND counter1(6) AND counter1(7) AND counter1(8) AND
      counter1(9));

FTCPE_counter121: FTCPE port map (counter1(21),counter1_T(21),clk,'0','0');
     counter1_T(21) <= (counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(16) AND counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND counter1(20) AND counter1(2) AND counter1(3) AND
      counter1(4) AND counter1(5) AND counter1(6) AND counter1(7) AND
      counter1(8) AND counter1(9));

FTCPE_counter122: FTCPE port map (counter1(22),counter1_T(22),clk,'0','0');
     counter1_T(22) <= ((counter1(0) AND counter1(10) AND counter1(11) AND
      counter1(12) AND counter1(13) AND counter1(14) AND counter1(15) AND
      counter1(16) AND counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND counter1(20) AND counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND counter1(6) AND
      counter1(7) AND counter1(8) AND counter1(9))
      OR (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));

FTCPE_counter20: FTCPE port map (counter2(0),'1',clk,'0','0',counter2_CE(0));
     counter2_CE(0) <= (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22));

FTCPE_counter21: FTCPE port map (counter2(1),counter2_T(1),clk,'0','0',counter2_CE(1));
     counter2_T(1) <= ((NOT counter2(0))
      OR (NOT counter2(1) AND NOT counter2(2) AND counter2(3) AND
      counter1(0) AND NOT counter1(10) AND counter1(11) AND NOT counter1(12) AND
      NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND NOT counter1(16) AND
      NOT counter1(17) AND counter1(18) AND counter1(19) AND counter1(1) AND
      NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND counter1(3) AND
      counter1(4) AND counter1(5) AND NOT counter1(6) AND NOT counter1(7) AND
      counter1(8) AND counter1(9) AND counter1(22)));
     counter2_CE(1) <= (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22));

FTCPE_counter22: FTCPE port map (counter2(2),counter2_T(2),clk,'0','0',counter2_CE(2));
     counter2_T(2) <= (counter2(1) AND counter2(0));
     counter2_CE(2) <= (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22));

FTCPE_counter23: FTCPE port map (counter2(3),counter2_T(3),clk,'0','0',counter2_CE(3));
     counter2_T(3) <= ((counter2(1) AND counter2(2) AND counter2(0))
      OR (NOT counter2(1) AND NOT counter2(2) AND counter2(0) AND
      counter2(3) AND counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22)));
     counter2_CE(3) <= (counter1(0) AND NOT counter1(10) AND counter1(11) AND
      NOT counter1(12) AND NOT counter1(13) AND counter1(14) AND NOT counter1(15) AND
      NOT counter1(16) AND NOT counter1(17) AND counter1(18) AND counter1(19) AND
      counter1(1) AND NOT counter1(20) AND NOT counter1(21) AND counter1(2) AND
      counter1(3) AND counter1(4) AND counter1(5) AND NOT counter1(6) AND
      NOT counter1(7) AND counter1(8) AND counter1(9) AND counter1(22));

ssd(0) <= ((counter2(1) AND NOT counter2(3))
      OR (NOT counter2(1) AND NOT counter2(2) AND counter2(3))
      OR (counter2(2) AND counter2(0) AND NOT counter2(3))
      OR (NOT counter2(2) AND NOT counter2(0) AND NOT counter2(3)));

ssd(1) <= ((NOT counter2(1) AND NOT counter2(2))
      OR (NOT counter2(2) AND NOT counter2(3))
      OR (counter2(1) AND counter2(0) AND NOT counter2(3))
      OR (NOT counter2(1) AND NOT counter2(0) AND NOT counter2(3)));

ssd(2) <= ((NOT counter2(1) AND NOT counter2(2))
OR (counter2(2) AND NOT counter2(3))
OR (counter2(0) AND NOT counter2(3)));

ssd(3) <= ((counter2(1) AND NOT counter2(2) AND NOT counter2(3))
      OR (counter2(1) AND NOT counter2(0) AND NOT counter2(3))
      OR (NOT counter2(1) AND NOT counter2(2) AND counter2(3))
      OR (NOT counter2(2) AND NOT counter2(0) AND NOT counter2(3))
      OR (NOT counter2(1) AND counter2(2) AND counter2(0) AND
      NOT counter2(3)));

ssd(4) <= ((counter2(1) AND NOT counter2(0) AND NOT counter2(3))
OR (NOT counter2(1) AND NOT counter2(2) AND NOT counter2(0)));

ssd(5) <= ((NOT counter2(1) AND counter2(2) AND NOT counter2(3))
      OR (NOT counter2(1) AND NOT counter2(2) AND counter2(3))
      OR (NOT counter2(1) AND NOT counter2(0) AND NOT counter2(3))
      OR (counter2(2) AND NOT counter2(0) AND NOT counter2(3)));

ssd(6) <= ((counter2(1) AND NOT counter2(2) AND NOT counter2(3))
      OR (NOT counter2(1) AND counter2(2) AND NOT counter2(3))
      OR (NOT counter2(1) AND NOT counter2(2) AND counter2(3))
      OR (counter2(2) AND NOT counter2(0) AND NOT counter2(3)));