slow_counter Project Status (05/24/2021 - 11:52:58)
Project File:	Segment.xise	Parser Errors:	No Errors
Module Name:	slow_counter	Implementation State:	Fitted
Target Device:	xc9536xl-5VQ44	Errors:	No Errors
Product Version:	ISE 14.7	Warnings:	1 Warning (0 new)
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:	System Settings	Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report	Current	H máj. 24 11:52:40 2021	0	1 Warning (0 new)	0
Translation Report	Current	H máj. 24 11:52:45 2021	0	0	0
CPLD Fitter Report (Text)	Current	H máj. 24 11:52:51 2021	0	1 Warning (1 new)	0
Power Report

 

Secondary Reports			[-]
Report Name	Status	Generated
Post-Fit Simulation Model Report

Date Generated: 05/24/2021 - 11:52:58