LIST P=16F1936, R=DEC
#include "P16F1936.inc"
;
OSCFREQ = 16		; 4,8,16 MHz
;
 __CONFIG _CONFIG1, 0x09A4
 __CONFIG _CONFIG2, 0x1433
; 
cblock 0x20
 Loop1,Loop2
endc
;
; full bridge PWM: P1D+P1A or P1B+P1C (16F1936 P1A=RC2, P1B=RB2, P1C=RB1, P1D=RB4)
trisamask			EQU b'11111111'
trisbmask			EQU b'11000000'
triscmask			EQU b'11000000'
;
functionport		EQU PORTC		; func 3-5-1-2-4
func1				EQU .5
func2				EQU .4
func3				EQU .0
func4				EQU .1
func5				EQU .3
;
P1ATRISPORT			EQU TRISC
P1A					EQU .2
P1BTRISPORT			EQU TRISB
P1B					EQU .2
P1C					EQU .1
P1D					EQU .4
;
 #include "settings_pwm.inc"
;
goto main
;
delay_250			; 250 millisec
	movlw 250
	movwf Loop1
Outer1	movlw 250
	movwf Loop2
Inner1	nop
	nop
		decfsz Loop2,F
	goto Inner1		; Inner loop = 5 usec
	decfsz Loop1,F
	goto Outer1
return
;
pwm_init
;
	banksel P1ATRISPORT
		bsf P1ATRISPORT,P1A
		bsf P1BTRISPORT,P1B
		bsf P1BTRISPORT,P1C
		bsf P1BTRISPORT,P1D
;
banksel PR2
	movlw 0x3F		; Fosc=16 MHz, TMR2PRESC=16, PR2=0x3F, f=3,9 kHz
	movwf PR2
banksel INTCON
	clrf INTCON		; disable all ints
banksel PIE1
	clrf PIE1		; disable all ints
banksel T2CON
	movlw b'01111100'	; 1:16 prescaler, T2ON=1.
	movwf T2CON
banksel CCPR1L
	clrf CCPR1L
banksel CCP1CON
; fbrdg activeH forward 01001100
; fbrdg activeH reverse 11001100
	movlw b'11001100'	; full bridge PWM output, active H
	movwf CCP1CON
;
	banksel P1ATRISPORT
		bcf P1ATRISPORT,P1A
		bcf P1BTRISPORT,P1B
		bcf P1BTRISPORT,P1C
		bcf P1BTRISPORT,P1D
;
banksel PORTA
return
;
pwm_base_duty			; 25%=0x1F, 50%=0x3E, 75%=0x5D
;
	;movf ADRES,0
	movlw 0x5D
	movwf CCPR1L
return
;
forward
banksel T2CON
		bcf T2CON,2	; TMR2 off
		nop		; waits for a while
		nop
		nop
		nop
		bcf CCP1CON,7	;  full duplex, forward
		bsf T2CON,2	; TMR2 on
banksel PORTA
return
;
reverse
banksel T2CON
		bcf T2CON,2	; TMR2 off
		nop		; waits for a while
		nop
		nop
		nop
		bsf CCP1CON,7	;  full duplex, reverse
		bsf T2CON,2	; TMR2 on
banksel PORTA
return
;


main
	
call pwm_init	
call pwm_base_duty



ide

	call forward
call delay_250
call delay_250
call delay_250
call delay_250
call delay_250
	call reverse
call delay_250
call delay_250
call delay_250
call delay_250
call delay_250






nop
nop
nop
nop
nop
goto ide
;goto main
end

;CCPXCON: CCPX CONTROL REGISTER
;bit 7-6 PxM<1:0>: Enhanced PWM Output Configuration bits(1)
;If CCPxM<3:2> = 11:
;00 = Single output; PxA modulated; PxB, PxC, PxD assigned as port pins
;01 = Full-Bridge output forward; P1D modulated; P1A active; P1B, P1C inactive
;10 = Half-Bridge output; P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
;11 = Full-Bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
;bit 5-4 DCxB<1:0>: PWM Duty Cycle Least Significant bits
;These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
;bit 3-0 CCPxM<3:0>: ECCPx Mode Select bits
; ...
;1100 = PWM mode: PxA, PxC active-high; PxB, PxD active-high
;1101 = PWM mode: PxA, PxC active-high; PxB, PxD active-low
;1110 = PWM mode: PxA, PxC active-low; PxB, PxD active-high
;1111 = PWM mode: PxA, PxC active-low; PxB, PxD active-low
;
; fbrdg activeH forward 01001100
; fbrdg activeH reverse 11001100